823 search results - page 148 / 165 » Brick partitions of graphs |
DATE
2002
IEEE
15 years 6 months ago
2002
IEEE
In this paper, we deal with arbitrary convex and concave rectilinear module packing using the Transitive Closure Graph (TCG) representation. The geometric meanings of modules are ...
111
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ICCAD
2000
IEEE
15 years 6 months ago
2000
IEEE
–An FPGA switch box is said to be hyper-universal if it is routable for all possible surrounding multi-pin net topologies satisfying the routing resource constraints. It is desir...
124
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DATE
1999
IEEE
15 years 6 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
116
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ITC
1999
IEEE
15 years 6 months ago
1999
IEEE
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
96
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ASYNC
1998
IEEE
15 years 6 months ago
1998
IEEE
We present the XDI Model for specifying delay-insensitive circuits, that is, reactive systems that correctly exchange signals with their environment in spite of unknown delays inc...