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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
15 years 2 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
DSN
2009
IEEE
15 years 1 months ago
Processor reliability enhancement through compiler-directed register file peak temperature reduction
Each semiconductor technology generation brings us closer to the imminent processor architecture heat wall, with all its associated adverse effects on system performance and reliab...
Chengmo Yang, Alex Orailoglu
SAC
2002
ACM
14 years 9 months ago
A comprehensive model for arbitrary result extraction
Within the realms of workflow management and grid computing, scheduling of distributed services is a central issue. Most schedulers balance time and cost to fit within a client�...
Neal Sample, Dorothea Beringer, Gio Wiederhold
ICALT
2006
IEEE
15 years 4 months ago
Towards Effective Usage-Based Learning Applications: Track and Learn from User Experience(s)
In this paper we propose a schema and framework for recording and managing attention metadata. This framework is intended to capture, manage, and re-use data about attention users...
Jehad Najjar, Erik Duval, Martin Wolpers
CORR
2007
Springer
142views Education» more  CORR 2007»
14 years 10 months ago
Resource and Application Models for Advanced Grid Schedulers
: As Grid computing is becoming an inevitable future, managing, scheduling and monitoring dynamic, heterogeneous resources will present new challenges. Solutions will have to be ag...
Aleksandar Lazarevic, Lionel Sacks