113 search results - page 11 / 23 » Buffer and register allocation for memory space optimization |
100
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EUROPAR
2008
Springer
15 years 1 months ago
2008
Springer
Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
99
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CODES
2007
IEEE
15 years 6 months ago
2007
IEEE
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
DATE
2008
IEEE
15 years 6 months ago
2008
IEEE
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
106
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LCTRTS
2009
Springer
15 years 6 months ago
2009
Springer
Register allocation is often a two-phase approach: spilling of registers to memory, followed by coalescing of registers. Extreme liverange splitting (i.e. live-range splitting aft...
94
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JSAC
2010
14 years 10 months ago
2010
—We present a cross-layer design of transmitting scalable video streams from a base station to multiple clients over a shared fading wireless network by jointly considering the a...