113 search results - page 12 / 23 » Buffer and register allocation for memory space optimization |
85
Voted
CASES
2003
ACM
15 years 3 months ago
2003
ACM
Processors such as StrongARM and memory such as SDRAM enable efficient execution of multiple loads and stores in a single instruction. This is particularly useful in connection wi...
107
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CF
2009
ACM
15 years 6 months ago
2009
ACM
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
171
Voted
POPL
2003
ACM
15 years 12 months ago
2003
ACM
We present an interprocedural and compositional algorithm for finding pairs of compatible allocation sites, which have the property that no object allocated at one site is live at...
100
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BROADNETS
2004
IEEE
15 years 3 months ago
2004
IEEE
In this paper, we present a framework for the design of minimal power schedulers that satisfy average packet delay bounds for multiple users in a Gaussian wireless broadcast chann...
CODES
2005
IEEE
15 years 5 months ago
2005
IEEE
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...