113 search results - page 19 / 23 » Buffer and register allocation for memory space optimization |
96
Voted
IASTEDSEA
2004
15 years 1 months ago
2004
Java applets run on a Virtual Machine that checks code's integrity and correctness before execution using a module called Bytecode Verifier. Java Card technology allows Java ...
104
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PLDI
2003
ACM
15 years 4 months ago
2003
ACM
Compiler writers have crafted many heuristics over the years to approximately solve NP-hard problems efficiently. Finding a heuristic that performs well on a broad range of applic...
ISQED
2005
IEEE
15 years 5 months ago
2005
IEEE
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
87
Voted
ISCA
2011
IEEE
14 years 3 months ago
2011
IEEE
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
176
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PODS
2009
ACM
16 years 5 days ago
2009
ACM
The B-tree is a fundamental external index structure that is widely used for answering one-dimensional range reporting queries. Given a set of N keys, a range query can be answere...