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» Buffer and register allocation for memory space optimization
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2008
15 years 2 months ago
AWOL: An Adaptive Write Optimizations Layer
Operating system memory managers fail to consider the population of read versus write pages in the buffer pool or outstanding I/O requests when writing dirty pages to disk or netw...
Alexandros Batsakis, Randal C. Burns, Arkady Kanev...
ICDE
2007
IEEE
125views Database» more  ICDE 2007»
15 years 6 months ago
Improved Buffer Size Adaptation through Cache/Controller Coupling
Database workloads seldom remain static. A system tuned by an expert for the current environment, might not always remain optimal. To deal with this situation, database systems ha...
Christian A. Lang, Bishwaranjan Bhattacharjee, Tim...
LCTRTS
2007
Springer
15 years 5 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
ECRTS
2007
IEEE
15 years 6 months ago
Predictable Paging in Real-Time Systems: A Compiler Approach
Conventionally, the use of virtual memory in real-time systems has been avoided, the main reason being the difficulties it provides to timing analysis. However, there is a trend ...
Isabelle Puaut, Damien Hardy
MICRO
2003
IEEE
161views Hardware» more  MICRO 2003»
15 years 4 months ago
Design and Implementation of High-Performance Memory Systems for Future Packet Buffers
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...
Jorge García-Vidal, Jesús Corbal, Ll...