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ICCAD
2001
IEEE
152views Hardware» more  ICCAD 2001»
15 years 6 months ago
Hybrid Structured Clock Network Construction
This paper hierarchically constructs a hybrid mesh/tree clock network structure consisting of overlying zero-skew clock meshes, with underlying zero-skew clock trees originating f...
Haihua Su, Sachin S. Sapatnekar
SOCC
2008
IEEE
106views Education» more  SOCC 2008»
15 years 4 months ago
A robust ultra-low power asynchronous FIFO memory with self-adaptive power control
First-in first-out (FIFO) memories are widely used in SoC for data buffering and flow control. In this paper, a robust ultra-low power asynchronous FIFO memory is proposed. With s...
Mu-Tien Chang, Po-Tsang Huang, Wei Hwang
74
Voted
IPPS
2005
IEEE
15 years 3 months ago
A Distributed Procedure for Bandwidth-Centric Scheduling of Independent-Task Applications
The problem of scheduling independent tasks on heterogeneous trees is considered. The nodes of the tree may have different processing times, and links different communication time...
Cyril Banino
86
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DATE
2000
IEEE
101views Hardware» more  DATE 2000»
15 years 2 months ago
Memory Arbitration and Cache Management in Stream-Based Systems
With the ongoing advancements in VLSI technology, the performance of an embedded system is determined to a large extend by the communication of data and instructions. This results...
Françoise Harmsze, Adwin H. Timmer, Jef L. ...
ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
15 years 2 months ago
SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery
We develop an availability solution, called SafetyNet, that uses a unified, lightweight checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At...
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, ...