156 search results - page 30 / 32 » Buffer minimization using max-coloring |
ISLPED
2000
ACM
15 years 1 months ago
2000
ACM
In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process...
ICPP
1999
IEEE
15 years 1 months ago
1999
IEEE
A router design for torus networks that significantly reduces message latency over traditional wormhole routers is presented in this paper. This new router implements virtual cut-...
IPPS
2003
IEEE
15 years 2 months ago
2003
IEEE
High performance, freedom from deadlocks, and freedom from livelocks are desirable properties of interconnection networks. Unfortunately, these can be conflicting goals because n...
179
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VLDB
2007
ACM
15 years 9 months ago
2007
ACM
Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capa...
102
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RSP
2000
IEEE
15 years 1 months ago
2000
IEEE
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...