56 search results - page 6 / 12 » Buffering global interconnects in structured ASIC design |
80
Voted
DAC
2001
ACM
15 years 10 months ago
2001
ACM
Using on-chip interconnection networks in place of ad-hoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules...
FPGA
2006
ACM
15 years 1 months ago
2006
ACM
The high unit cost of FPGA devices often deters their use beyond the prototyping stage. Efforts have been made to reduce the part-cost of FPGA devices, resulting in the developmen...
ISPASS
2009
IEEE
15 years 4 months ago
2009
IEEE
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
110
click to vote
FPGA
2008
ACM
14 years 11 months ago
2008
ACM
Look-up table based FPGAs have migrated from a niche technology for design prototyping to a valuable end-product component and, in some cases, a replacement for general purpose pr...
DAC
1998
ACM
15 years 10 months ago
1998
ACM
In this paper we present a new global router appropriate for Multichip Module MCM and dense Printed Circuit Board PCB design, which utilizes a hybrid of the classical rip-up and r...