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» Built-in test generation for synchronous sequential circuits
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JAIR
2010
165views more  JAIR 2010»
14 years 8 months ago
A Model-Based Active Testing Approach to Sequential Diagnosis
Model-based diagnostic reasoning often leads to a large number of diagnostic hypotheses. The set of diagnoses can be reduced by taking into account extra observations (passive mon...
Alexander Feldman, Gregory M. Provan, Arjan J. C. ...
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
15 years 6 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...
ATS
2005
IEEE
100views Hardware» more  ATS 2005»
15 years 3 months ago
Finite State Machine Synthesis for At-Speed Oscillation Testability
In this paper, we propose an oscillation-based test methodology for sequential testing. This approach provides many advantages over traditional methods. (1) It is at-speed testing...
Katherine Shu-Min Li, Chung-Len Lee, Tagin Jiang, ...
INTEGRATION
2006
102views more  INTEGRATION 2006»
14 years 9 months ago
A parameterized graph-based framework for high-level test synthesis
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
Saeed Safari, Amir-Hossein Jahangir, Hadi Esmaeilz...
ICCAD
1999
IEEE
115views Hardware» more  ICCAD 1999»
15 years 1 months ago
An approach for improving the levels of compaction achieved by vector omission
We describe a method referred to as sequence counting to improve on the levels of compaction achievable by vector omission based static compaction procedures. Such procedures are ...
Irith Pomeranz, Sudhakar M. Reddy