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» Bus encoding for low-power high-performance memory systems
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CODES
2009
IEEE
14 years 1 months ago
FRA: a flash-aware redundancy array of flash storage devices
Since flash memory has many attractive characteristics such as high performance, non-volatility, low power consumption and shock resistance, it has been widely used as storage med...
Yangsup Lee, Sanghyuk Jung, Yong Ho Song
JSA
2006
167views more  JSA 2006»
13 years 6 months ago
Pattern-driven prefetching for multimedia applications on embedded processors
Multimedia applications in general and video processing, such as the MPEG4 Visual stream decoders, in particular are increasingly popular and important workloads for future embedd...
Hassan Sbeyti, Smaïl Niar, Lieven Eeckhout
DAC
2003
ACM
14 years 7 months ago
A survey of techniques for energy efficient on-chip communication
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
Vijay Raghunathan, Mani B. Srivastava, Rajesh K. G...
IV
1999
IEEE
91views Visualization» more  IV 1999»
13 years 10 months ago
Triangle Mesh Compression for Fast Rendering
Modern GIS(Geographic Information System) application programs and simulation systems have to handle large datasets for rendering. Currently three dimensional rendering hardware a...
Dong-Gyu Park, Yang-Soo Kim, Hwan-Gue Cho
RTAS
1997
IEEE
13 years 10 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford