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ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
15 years 4 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
140
Voted
ICVS
1999
Springer
15 years 4 months ago
Face-Tracking and Coding for Video Compression
While computing power and transmission bandwidth have both been steadily increasing over the last few years, bandwidth rather than processing power remains the primary bottleneck f...
William E. Vieux, Karl Schwerdt, James L. Crowley
104
Voted
IATA
1998
Springer
15 years 4 months ago
Agent-Based Schemes for Plug-And-Play Network Components
In this paper, we present several approaches to making the process of configuring network devices easier than is currently the case. Configuring a device requires that a number of ...
Andrzej Bieszczad, Syed Kamran Raza, Bernard Pagur...
ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
15 years 4 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin
ICDE
2010
IEEE
290views Database» more  ICDE 2010»
15 years 4 months ago
The Model-Summary Problem and a Solution for Trees
Modern science is collecting massive amounts of data from sensors, instruments, and through computer simulation. It is widely believed that analysis of this data will hold the key ...
Biswanath Panda, Mirek Riedewald, Daniel Fink
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