This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
—Many efficient random testing algorithms for object-oriented software have been proposed due to their simplicity and reasonable code coverage; however, even the stateof-the-art...
Memory bandwidth issues present a formidable bottleneck to accelerating embedded applications, particularly data bandwidth for multiple-issue VLIW processors. Providing an efficie...
Paul Morgan, Richard Taylor, Japheth Hossell, Geor...
This article proposes a hardware/software partitioning method targeted to performance-constrained systems for datapath applications. Exploiting a platform based design, a Timed Pe...
We present a system-level technique to analyze the impact of design optimizations on system-level timing dependencies. This technique enables us to speed up the design cycle by su...