3456 search results - page 386 / 692 » Byte Code Engineering |
146
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WCRE
2002
IEEE
15 years 9 months ago
2002
IEEE
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
130
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CODES
2000
IEEE
15 years 9 months ago
2000
IEEE
This paper discusses the trade-off between calculations and memory accesses in a 3D graphics tile renderer for visualization of data from medical scanners. The performance require...
119
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CODES
2000
IEEE
15 years 9 months ago
2000
IEEE
Frequency interleaving is introduced as a means of conceptualizing and co-scheduling hardware and software behaviors so that software models with conceptually unbounded state and ...
136
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CODES
2000
IEEE
15 years 9 months ago
2000
IEEE
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
115
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CODES
1999
IEEE
15 years 8 months ago
1999
IEEE
In this paper, we propose a fast and simple heuristic for the cosynthesis problem targeting the system-on-chip (SOC) design. The proposed algorithm covers from implementation sele...