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CODES
2008
IEEE
15 years 6 months ago
Model checking SystemC designs using timed automata
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Paula Herber, Joachim Fellmuth, Sabine Glesner
CODES
2008
IEEE
15 years 6 months ago
Specification-based compaction of directed tests for functional validation of pipelined processors
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
Heon-Mo Koo, Prabhat Mishra
CODES
2008
IEEE
15 years 6 months ago
Guaranteed scheduling for repetitive hard real-time tasks under the maximal temperature constraint
We study the problem of scheduling repetitive real-time tasks with the Earliest Deadline First (EDF) policy that can guarantee the given maximal temperature constraint. We show th...
Gang Quan, Yan Zhang, William Wiles, Pei Pei
CODES
2008
IEEE
15 years 6 months ago
Design and defect tolerance beyond CMOS
It is well recognized that novel computational models, devices and technologies are needed in order to sustain the remarkable advancement of CMOS-based VLSI circuits and systems. ...
Xiaobo Sharon Hu, Alexander Khitun, Konstantin K. ...
ISSRE
2007
IEEE
15 years 5 months ago
Data Mining Techniques for Building Fault-proneness Models in Telecom Java Software
This paper describes a study performed in an industrial setting that attempts to build predictive models to identify parts of a Java system with a high probability of fault. The s...
Erik Arisholm, Lionel C. Briand, Magnus Fuglerud