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CODES
2007
IEEE
15 years 9 months ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas
CODES
2007
IEEE
15 years 9 months ago
Smart driver for power reduction in next generation bistable electrophoretic display technology
Microencapsulated electrophoretic displays (EPDs) are quickly emerging as an important technology for use in battery-powered portable computing devices. Thanks to bistability and ...
Michael A. Baker, Aviral Shrivastava, Karam S. Cha...
LCTRTS
2007
Springer
15 years 9 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
CGO
2006
IEEE
15 years 9 months ago
Exhaustive Optimization Phase Order Space Exploration
The phase-ordering problem is a long standing issue for compiler writers. Most optimizing compilers typically have numerous different code-improving phases, many of which can be a...
Prasad Kulkarni, David B. Whalley, Gary S. Tyson, ...
CGO
2006
IEEE
15 years 9 months ago
BIRD: Binary Interpretation using Runtime Disassembly
The majority of security vulnerabilities published in the literature are due to software bugs. Many researchers have developed program transformation and analysis techniques to au...
Susanta Nanda, Wei Li, Lap-Chung Lam, Tzi-cker Chi...