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ICS
2004
Tsinghua U.
15 years 8 months ago
Evaluating support for global address space languages on the Cray X1
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...
Christian Bell, Wei-Yu Chen, Dan Bonachea, Katheri...
149
Voted
DM
2006
128views more  DM 2006»
15 years 2 months ago
Non-trivial t-designs without repeated blocks exist for all t
A computer package is being developed at Bayreuth for the generation and investigation of discrete structures. The package is a C and C++ class library of powerful algorithms endow...
Luc Teirlinck
123
Voted
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 16 days ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
123
Voted
JCO
2011
115views more  JCO 2011»
14 years 9 months ago
Approximation scheme for restricted discrete gate sizing targeting delay minimization
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
Chen Liao, Shiyan Hu
126
Voted
PARA
2000
Springer
15 years 6 months ago
JavaGrande - High Performance Computing with Java
The JavaGrande Forum is a group of users, researchers, and interested parties from industry. The Forum members are either trying to use Java for resource-intensive applications or ...
Michael Philippsen, Ronald F. Boisvert, Vladimir G...