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ISCA
2005
IEEE
88views Hardware» more  ISCA 2005»
15 years 3 months ago
Architecture for Protecting Critical Secrets in Microprocessors
We propose “secret-protected (SP)” architecture to enable secure and convenient protection of critical secrets for a given user in an on-line environment. Keys are examples of...
Ruby B. Lee, Peter C. S. Kwan, John Patrick McGreg...
ISCAS
2005
IEEE
103views Hardware» more  ISCAS 2005»
15 years 3 months ago
Why area might reduce power in nanoscale CMOS
— In this paper we explore the relationship between power and area. By exploiting parallelism (and thus using more area) one can reduce the switching frequency allowing a reducti...
Paul Beckett, S. C. Goldstein
ISCAS
2005
IEEE
138views Hardware» more  ISCAS 2005»
15 years 3 months ago
Transition time bounded low-power clock tree construction
— Recently power becomes a significant issue in clock network design for high-performance ICs because the clock network consumes a large portion of the total power in the whole s...
Min Pan, Chris C. N. Chu, J. Morris Chang
RTAS
2005
IEEE
15 years 3 months ago
Improving WCET by Optimizing Worst-Case Paths
It is advantageous to perform compiler optimizations to lower the WCET of a task since tasks with lower WCETs are easier to schedule and more likely to meet their deadlines. Compi...
Wankang Zhao, William C. Kreahling, David B. Whall...
SAC
2005
ACM
15 years 3 months ago
Supporting e-commerce systems formalization with choreography languages
E-commerce as well as B2B applications are essentially based on interactions between different people and organizations (e.g. industry, banks, customers) that usually exploit the ...
Mario Bravetti, Claudio Guidi, Roberto Lucchi, Gia...