Sciweavers

3404 search results - page 538 / 681
» C Programming Tutorial
Sort
View
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
15 years 3 months ago
Data marshaling for multi-core architectures
Previous research has shown that Staged Execution (SE), i.e., dividing a program into segments and executing each segment at the core that has the data and/or functionality to bes...
M. Aater Suleman, Onur Mutlu, José A. Joao,...
DATE
2002
IEEE
104views Hardware» more  DATE 2002»
15 years 2 months ago
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors
In this paper, we suggest hardware-assisted data compression as a tool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture ...
Luca Benini, Davide Bruni, Alberto Macii, Enrico M...
HICSS
2002
IEEE
82views Biometrics» more  HICSS 2002»
15 years 2 months ago
The IT Support for Acquired Brain Injury Patients - the Design and Evaluation of a New Software Package
The problems of producing a software system to assist in the rehabilitation of people who have suffered serious traumatic brain injuries are described. In addition to this primary...
Micaela Serra, Jon C. Muzio
ICPPW
2002
IEEE
15 years 2 months ago
MigThread: Thread Migration in DSM Systems
Distributed Shared Memory (DSM) systems provide a logically shared memory over physically distributed memory to enable parallel computation on Networks of Workstations (NOWs). In ...
Hai Jiang, Vipin Chaudhary
IEEEPACT
2002
IEEE
15 years 2 months ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...