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ISVLSI
2007
IEEE
230views VLSI» more  ISVLSI 2007»
15 years 4 months ago
A Methodology and Toolset to Enable SystemC and VHDL Co-simulation
The new design challenges imposed by the increasing difficulties of today’s electronic systems obligated designers to develop new methodologies. System-level design and Platfor...
Richard Maciel, Bruno Albertini, Sandro Rigo, Guid...
DAC
2004
ACM
15 years 1 months ago
An SoC design methodology using FPGAs and embedded microprocessors
In System on Chip (SoC) design, growing design complexity has esigners to start designs at higher abstraction levels. This paper proposes an SoC design methodology that makes full...
Nobuyuki Ohba, Kohji Takano
AICCSA
2008
IEEE
266views Hardware» more  AICCSA 2008»
15 years 4 months ago
A novel flow-sensitive type and effect analysis for securing C code
In this paper, we present a novel type and effect analysis for detecting type cast errors and memory errors in C source code. Our approach involves a type system with effect, regi...
Syrine Tlili, Mourad Debbabi
IEEEARES
2008
IEEE
15 years 4 months ago
Type and Effect Annotations for Safe Memory Access in C
In this paper, we present a novel type and effect analysis for detecting memory errors in C source code. We extend the standard C type system with effect, region, and host annotat...
Syrine Tlili, Mourad Debbabi
CASES
2007
ACM
15 years 1 months ago
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms
Many MPSoC applications are loop-intensive and amenable to automatic parallelization with suitable compiler support. One of the key components of any compiler-parallelized code is...
Andrea Marongiu, Luca Benini, Mahmut T. Kandemir