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CAGD
2007
156views more  CAGD 2007»
14 years 12 months ago
A control polygon scheme for design of planar C2 PH quintic spline curves
A scheme to specify planar C2 Pythagorean-hodograph (PH) quintic spline curves by control polygons is proposed, in which the “ordinary” C2 cubic B-spline curve serves as a ref...
Francesca Pelosi, Maria Lucia Sampoli, Rida T. Far...
DAC
2008
ACM
16 years 26 days ago
Daedalus: toward composable multimedia MP-SoC design
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which ...
Hristo Nikolov, Mark Thompson, Todor Stefanov, And...
DAC
2006
ACM
16 years 25 days ago
Programming models and HW-SW interfaces abstraction for multi-processor SoC
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
Ahmed Amine Jerraya, Aimen Bouchhima, Fréd&...
SIGSOFT
2008
ACM
16 years 18 days ago
Inter-context control-flow and data-flow test adequacy criteria for nesC applications
NesC is a programming language for applications that run on top of networked sensor nodes. Such an application mainly uses an interrupt to trigger a sequence of operations, known ...
Zhifeng Lai, Shing-Chi Cheung, Wing Kwong Chan
CISIS
2008
IEEE
15 years 6 months ago
On the Potential of NoC Virtualization for Multicore Chips
As the end of Moores-law is on the horizon, power becomes a limiting factor to continuous increases in performance gains for single-core processors. Processor engineers have shifte...
Jose Flich, Samuel Rodrigo, José Duato, Tho...