In this paper, we study the problem of retiming of sequential circuits with both interconnect and gate delay. Most retiming algorithms have assumed ideal conditions for the non-lo...
Chris C. N. Chu, Evangeline F. Y. Young, Dennis K....
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
A substantial percentage of links in wireless networks, especially low-power ones, is asymmetric. For the low-quality direction of asymmetric links, we observe based on testbed ex...
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
Modern multicore processors, such as the Cell Broadband Engine, achieve high performance by equipping accelerator cores with small “scratchpad” memories. The price for increase...
Alastair F. Donaldson, Daniel Kroening, Philipp R&...