267 search results - page 22 / 54 » CHIPS: Custom Hardware Instruction Processor Synthesis |
ASAP
1996
IEEE
15 years 1 months ago
1996
IEEE
Kestrel is a programmable linear array processor designed for sequence analysis. Among other features, Kestrel includes an 8-bit word, a single-cycle add-and-minimize instruction, ...
DAC
2003
ACM
15 years 10 months ago
2003
ACM
In the way they cope with variability, present-day methodologies are onerous, pessimistic and risky, all at the same time! Dealing with variability is an increasingly important as...
ARC
2008
Springer
14 years 11 months ago
2008
Springer
Over the last years, we have witnessed the increased use of Application-Specific Instruction-Set Processors (ASIPs). These ASIPs are processors that have a customizable instruction...
MICRO
1994
IEEE
15 years 1 months ago
1994
IEEE
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
MICRO
2002
IEEE
15 years 2 months ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...