To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
I-Wei Wu, Zhi-Yuan Chen, Jean Jyh-Jiun Shann, Chun...
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Microchip structures represent an attractive platform for microscale chemical processing of fluidic systems. However, standardized design methods for these devices have not yet b...
We present an architecture and hardware for scheduling gigabit packet streams in server clusters that combines a Network Processor datapath and an FPGA for use in server NICs and ...