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» CHIPS: Custom Hardware Instruction Processor Synthesis
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MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
15 years 4 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
JCSC
2002
87views more  JCSC 2002»
14 years 9 months ago
Power Estimator Development for Embedded System Memory Tuning
Memory accesses account for a large percentage of total power in microprocessor-based embedded systems. The increasing use of microprocessor cores and synthesis, rather than prefa...
Frank Vahid, Tony Givargis, Susan Cotterell
ISSS
1995
IEEE
116views Hardware» more  ISSS 1995»
15 years 1 months ago
The Chinook hardware/software co-synthesis system
Designers of embedded systems are facing ever tighter constraintson design time, but computer aided design tools for embedded systems have not kept pace with these trends. The Chi...
Pai H. Chou, Ross B. Ortega, Gaetano Borriello
94
Voted
DAC
2005
ACM
15 years 10 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
CODES
2005
IEEE
15 years 3 months ago
FlexPath NP: a network processor concept with application-driven flexible processing paths
In this paper, we present a new architectural concept for network processors called FlexPath NP. The central idea behind FlexPath NP is to systematically map network processor (NP...
Rainer Ohlendorf, Andreas Herkersdorf, Thomas Wild