267 search results - page 42 / 54 » CHIPS: Custom Hardware Instruction Processor Synthesis |
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
73
Voted
SIES
2008
IEEE
15 years 4 months ago
2008
IEEE
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
ISCA
2010
IEEE
15 years 2 months ago
2010
IEEE
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
TDSC
2010
14 years 8 months ago
2010
—Soft errors (or Transient faults) are temporary faults that arise in a circuit due to a variety of internal noise and external sources such as cosmic particle hits. Though soft ...
70
Voted
SAC
2004
ACM
15 years 3 months ago
2004
ACM
Clustered L0 buffers are an interesting alternative to reduce energy consumption in the instruction memory hierarchy of embedded VLIW processors. Currently, the synthesis of L0 cl...