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» CHIPS: Custom Hardware Instruction Processor Synthesis
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CODES
2007
IEEE
15 years 4 months ago
A data protection unit for NoC-based architectures
Security is gaining increasing relevance in the development of embedded devices. Towards a secure system at each level of design, this paper addresses the security aspects related...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
102
Voted
CF
2006
ACM
15 years 3 months ago
Dynamic thread assignment on heterogeneous multiprocessor architectures
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...
Michela Becchi, Patrick Crowley
AAAI
2010
14 years 11 months ago
Evolving Compiler Heuristics to Manage Communication and Contention
As computer architectures become increasingly complex, hand-tuning compiler heuristics becomes increasingly tedious and time consuming for compiler developers. This paper presents...
Matthew E. Taylor, Katherine E. Coons, Behnam Roba...
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
15 years 3 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
14 years 7 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen