Sciweavers

568 search results - page 3 / 114
» CPU Time Measurement Errors
Sort
View
DAC
2004
ACM
15 years 10 months ago
Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding
This paper describes a dynamic voltage and frequency scaling (DVFS) technique for MPEG decoding to reduce the energy consumption using the computational workload decomposition. Th...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
HPDC
2012
IEEE
12 years 12 months ago
vSlicer: latency-aware virtual machine scheduling via differentiated-frequency CPU slicing
Recent advances in virtualization technologies have made it feasible to host multiple virtual machines (VMs) in the same physical host and even the same CPU core, with fair share ...
Cong Xu, Sahan Gamage, Pawan N. Rao, Ardalan Kanga...
NOSSDAV
2005
Springer
15 years 3 months ago
Meeting CPU constraints by delaying playout of multimedia tasks
Multimedia applications today constitute a significant fraction of the workload running on portable devices such as mobile phones, PDAs and MP3 players. However, the processors i...
Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi
75
Voted
ICVGIP
2008
14 years 11 months ago
Implementation of the "Local Rank Differences" Image Feature Using SIMD Instructions of CPU
Usage of statistical classifiers, namely AdaBoost and its modifications, in object detection and pattern recognition is a contemporary and popular trend. The computatiponal perfor...
Adam Herout, Pavel Zemcík, Roman Jurá...
72
Voted
ISPASS
2009
IEEE
15 years 4 months ago
WARP: Enabling fast CPU scheduler development and evaluation
Abstract—Developing CPU scheduling algorithms and understanding their impact in practice can be difficult and time consuming due to the need to modify and test operating system ...
Haoqiang Zheng, Jason Nieh