869 search results - page 105 / 174 » Cache Architectures for Reconfigurable Hardware |
117
click to vote
ICCD
2004
IEEE
16 years 10 days ago
2004
IEEE
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data stre...
144
Voted
FCCM
2005
IEEE
15 years 9 months ago
2005
IEEE
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
132
Voted
ERSA
2010
15 years 1 months ago
2010
Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements...
112
Voted
ERSA
2010
15 years 24 days ago
2010
As reconfigurable computing (RC) platforms are becoming increasingly large-scale and heterogeneous, efficiently scheduling and partitioning applications on these platforms is a gro...
92
Voted
FPL
2005
Springer
15 years 9 months ago
2005
Springer
This paper describes novel data-path architecture for FPGA-based multimedia processors. The proposed circuit can adapt itself at run-time to different operations and data wordleng...