869 search results - page 13 / 174 » Cache Architectures for Reconfigurable Hardware |
ERSA
2008
15 years 1 months ago
2008
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
ICCD
2002
IEEE
15 years 8 months ago
2002
IEEE
This paper proposes a low-energy instruction-cache architecture, called history-based tag-comparison (HBTC) cache. The HBTC cache attempts to re-use tag-comparison results for avo...
FPL
2006
Springer
15 years 3 months ago
2006
Springer
Reconfigurable architectures are becoming increasingly popular with space related design engineers as they are inherently flexible to meet multiple requirements and offer signific...
MICRO
2000
IEEE
14 years 11 months ago
2000
IEEE
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...
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Voted
FPL
1998
Springer
15 years 3 months ago
1998
Springer
Abstract. We present different architectures to solve Boolean satisfiability problems in instance-specific hardware. A simulation of these architectures shows that for examples fro...