869 search results - page 14 / 174 » Cache Architectures for Reconfigurable Hardware |
ARC
2006
Springer
15 years 1 months ago
2006
Springer
This paper presents a reconfigurable hardware architecture for Public-key cryptosystems. By changing the connections of coarse grain Carry-Save Adders (CSAs), the datapath provides...
116
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AHS
2006
IEEE
15 years 1 months ago
2006
IEEE
We propose a novel type of dynamically reconfigurable System-on-Chip architecture, the Gannet service-based architecture. This novel concept addresses the issue of systemlevel rec...
FCCM
2000
IEEE
15 years 2 months ago
2000
IEEE
Fault tolerance is becoming an increasingly important issue, especially in mission-critical applications where data integrity is a paramount concern. Performance, however, remains...
88
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EUROPAR
2010
Springer
14 years 10 months ago
2010
Springer
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
ISCA
1998
IEEE
15 years 1 months ago
1998
IEEE
Traditional graphics hardware architectures implement what we call the push architecture for texture mapping. Local memory is dedicated to the accelerator for fast local retrieval...