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ASAP
1996
IEEE
145views Hardware» more  ASAP 1996»
15 years 1 months ago
A Synthesis System For Bus-Based Wavefront Array Architectures
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
Reiner W. Hartenstein, Jürgen Becker, Michael...
JIRS
2007
108views more  JIRS 2007»
14 years 9 months ago
Task-based Hardware Reconfiguration in Mobile Robots Using FPGAs
This paper presents a methodology for the realization of intelligent, task-based reconfiguration of the computational hardware for mobile robot applications. Task requirements are ...
Sesh Commuri, V. Tadigotla, L. Sliger
DATE
2009
IEEE
97views Hardware» more  DATE 2009»
15 years 4 months ago
Mode-based reconfiguration of critical software component architectures
Etienne Borde, Grégory Haïk, Laurent P...
61
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ASPDAC
2009
ACM
174views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Accuracy-aware SRAM: a reconfigurable low power SRAM architecture for mobile multimedia applications
Minki Cho, Jason Schlessman, Wayne Wolf, Saibal Mu...
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
15 years 4 months ago
Scalable reconfigurable channel decoder architecture for future wireless handsets
Gummidipudi Krishnaiah, Nur Engin, Sergei Sawitzki