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» Cache Architectures for Reconfigurable Hardware
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65
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ARC
2006
Springer
82views Hardware» more  ARC 2006»
15 years 1 months ago
Hardware and a Tool Chain for ADRES
Until recently, only a compiler and a high-level simulator of the reconfigurable architecture ADRES existed. This paper focuses on the problems that needed to be solved when moving...
Bjorn De Sutter, Bingfeng Mei, Andrei Bartic, Tom ...
89
Voted
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
15 years 4 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
SIGMETRICS
2000
ACM
147views Hardware» more  SIGMETRICS 2000»
14 years 9 months ago
High-capacity Internet middleware: Internet caching system architectural overview
Previous studies measuring the performance of general-purpose operating systems running large-scale Internet server applications, such as proxy caches, have identified design defi...
Gary Tomlinson, Drew Major, Ron Lee
64
Voted
ICES
2003
Springer
88views Hardware» more  ICES 2003»
15 years 2 months ago
POEtic Tissue: An Integrated Architecture for Bio-inspired Hardware
It is clear to all, after a moments thought, that nature has much we might be inspired by when designing our systems, for example: robustness, adaptability and complexity, to name ...
Andrew M. Tyrrell, Eduardo Sanchez, Dario Floreano...