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CC
2008
Springer
14 years 11 months ago
2008
Springer
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
ICON
2007
IEEE
15 years 4 months ago
2007
IEEE
— Within packet processing systems, lengthy memory accesses greatly reduce performance. To overcome this limitation, network processors utilize many different techniques, e.g., u...
IEEEPACT
2006
IEEE
15 years 3 months ago
2006
IEEE
The role of the operating system (OS) in managing shared resources such as CPU time, memory, peripherals, and even energy is well motivated and understood [23]. Unfortunately, one...
ERSA
2006
14 years 11 months ago
2006
: Traditional FPGA architectures can potentially allow the dynamic swap in and out of hardware tasks through 2D partial reconfiguration. A segmented bus structure is proposed to be...
ERSA
2004
14 years 11 months ago
2004
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...