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DATE
2010
IEEE
144views Hardware» more  DATE 2010»
15 years 2 months ago
A reconfigurable hardware for one bit transform based multiple reference frame Motion Estimation
—Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low comput...
Abdulkadir Akin, G. Sayilar, Ilker Hamzaoglu
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
15 years 6 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
ARC
2008
Springer
112views Hardware» more  ARC 2008»
14 years 11 months ago
Lossless Compression for Space Imagery in a Dynamically Reconfigurable Architecture
Abstract. This paper presents a novel dynamically reconfigurable hardware architecture for lossless compression and its optimization for space imagery. The proposed system makes us...
Xiaolin Chen, Cedric Nishan Canagarajah, Raffaele ...
ISLPED
2003
ACM
127views Hardware» more  ISLPED 2003»
15 years 2 months ago
Lightweight set buffer: low power data cache for multimedia application
A new architectural technique to reduce power dissipation in data caches is proposed. In multimedia applications, a major portion of data cache accesses hit in the same cache set ...
Jun Yang 0002, Youtao Zhang
ERSA
2010
115views Hardware» more  ERSA 2010»
14 years 7 months ago
Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware
Research in communication networks has shown that the Internet architecture is not sufficient for modern communication areas such as the interconnection networks of super computing...
Enno Lübbers, Marco Platzner, Christian Pless...