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AHS
2006
IEEE
152views Hardware» more  AHS 2006»
15 years 3 months ago
Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) architecture that has been proposed for reconfigurable Multiprocessor system-on-chip ...
Balal Ahmad, Ahmet T. Erdogan, Sami Khawam
CHES
2006
Springer
125views Cryptology» more  CHES 2006»
15 years 1 months ago
Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware
A novel portable hardware architecture of the Elliptic Curve Method of factoring, designed and optimized for application in the relation collection step of the Number Field Sieve,...
Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbr...
ISCAS
2003
IEEE
129views Hardware» more  ISCAS 2003»
15 years 3 months ago
SONICmole: a debugging environment for the UltraSONIC reconfigurable computer
Reconfigurable Computers based on a combination of conventional microprocessors and Field Programmable Gate Arrays (FPGAs) presents new challenges to designers. Debugging on such ...
Theerayod Wiangtong, Chun Te Ewe, Peter Y. K. Cheu...
EH
1999
IEEE
122views Hardware» more  EH 1999»
15 years 2 months ago
The MorphoSys Dynamically Reconfigurable System-on-Chip
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Ba...
ARC
2008
Springer
89views Hardware» more  ARC 2008»
14 years 11 months ago
A Networked, Lightweight and Partially Reconfigurable Platform
Abstract. In this paper we present a networked lightweight and partially reconfigurable platform assisted by a remote bitstreams server. We propose a software and hardware architec...
Pierre Bomel, Guy Gogniat, Jean-Philippe Diguet