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» Cache Architectures for Reconfigurable Hardware
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ISLPED
2004
ACM
137views Hardware» more  ISLPED 2004»
15 years 3 months ago
Location cache: a low-power L2 cache system
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
Rui Min, Wen-Ben Jone, Yiming Hu
RECONFIG
2008
IEEE
156views VLSI» more  RECONFIG 2008»
15 years 4 months ago
Forward-Secure Content Distribution to Reconfigurable Hardware
Confidentiality and integrity of bitstreams and authenticated update of FPGA configurations are fundamental to trusted computing on reconfigurable technology. In this paper, we pr...
David Champagne, Reouven Elbaz, Catherine H. Gebot...
DATE
2010
IEEE
174views Hardware» more  DATE 2010»
15 years 2 months ago
VAPRES: A Virtual Architecture for Partially Reconfigurable Embedded Systems
- Due to the runtime flexibility offered by field programmable gate arrays (FPGAs), FPGAs are popular devices for stream processing systems, since many stream processing applicatio...
Abelardo Jara-Berrocal, Ann Gordon-Ross
53
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ASPDAC
2006
ACM
126views Hardware» more  ASPDAC 2006»
15 years 3 months ago
PARLGRAN: parallelism granularity selection for scheduling task chains on dynamically reconfigurable architectures
Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil Dutt