869 search results - page 50 / 174 » Cache Architectures for Reconfigurable Hardware |
MICRO
1997
IEEE
15 years 1 months ago
1997
IEEE
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimize the cost of accessing data. This dependence will increase with the expected i...
FPL
1998
Springer
15 years 2 months ago
1998
Springer
With the XC6200 FPGA Xilinx introduced the first commercially available FPGA designed for reconfigurable computing. It has a completely new internal architecture, so new design alg...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function ca...
SBCCI
2004
ACM
15 years 3 months ago
2004
ACM
Digital Control System in the industry has been used in most of the applications based on expensive Programmable Logical Controllers (PLC). These Systems are, in general, highly c...
AHS
2006
IEEE
15 years 3 months ago
2006
IEEE
The discrete wavelet Transform (DWT), as defined by the Image Compression Standard JPEG-2000, is one of the most time-consuming computations which cannot be efficiently executed o...