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ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
15 years 1 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress
CN
2002
77views more  CN 2002»
14 years 9 months ago
Architecture of a Web server accelerator
We describe the design, implementation and performance of a high-performance Web server accelerator which runs on an embedded operating system and improves Web server performance ...
Junehwa Song, Arun Iyengar, Eric Levy-Abegnoli, Da...
FPL
2000
Springer
93views Hardware» more  FPL 2000»
15 years 1 months ago
Reconfigurable Computing between Classifications and Metrics - The Approach of Space/Time-Scheduling
Abstract. Reconfigurable computing receives its merits from scheduling timebased into space-based execution. This paper reviews some common parameters and introduces an additional ...
Christian Siemers
ERSA
2006
111views Hardware» more  ERSA 2006»
14 years 11 months ago
Promises and Pitfalls of Reconfigurable Supercomputing
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...
Maya Gokhale, Christopher Rickett, Justin L. Tripp...
DATE
2007
IEEE
71views Hardware» more  DATE 2007»
15 years 4 months ago
Task scheduling for reliable cache architectures of multiprocessor systems
This paper presents a task scheduling method for reliable cache architectures (RCAs) of multiprocessor systems. The RCAs dynamically switch their operation modes for reducing the ...
Makoto Sugihara, Tohru Ishihara, Kazuaki Murakami