869 search results - page 57 / 174 » Cache Architectures for Reconfigurable Hardware |
ISLPED
1995
ACM
15 years 1 months ago
1995
ACM
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
—This paper presents a memory-conscious mapping methodology of computational intensive applications on coarse-grain reconfigurable arrays. By exploiting the inherent abundant amo...
FPL
2005
Springer
15 years 3 months ago
2005
Springer
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
ICCD
1999
IEEE
15 years 2 months ago
1999
IEEE
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
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ECRTS
2006
IEEE
15 years 3 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...