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MAM
2006
125views more  MAM 2006»
14 years 9 months ago
Stream computations organized for reconfigurable execution
Reconfigurable systems can offer the high spatial parallelism and fine-grained, bit-level resource control traditionally associated with hardware implementations, along with the f...
André DeHon, Yury Markovsky, Eylon Caspi, M...
DICTA
2007
14 years 11 months ago
Speeding up Mutual Information Computation Using NVIDIA CUDA Hardware
We present an efficient method for mutual information (MI) computation between images (2D or 3D) for NVIDIA’s ‘compute unified device architecture’ (CUDA) compatible devic...
Ramtin Shams, Nick Barnes
FPL
2000
Springer
96views Hardware» more  FPL 2000»
15 years 1 months ago
Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures
Coarse-grain reconfigurable architectures have been a matter of intense research in the last few years. They promise to be more adequate for computational tasks due to their better...
Reiner W. Hartenstein, Michael Herz, Thomas Hoffma...
CASES
2001
ACM
15 years 1 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
15 years 1 months ago
Power-aware mapping for reconfigurable NoC architectures
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
Mehdi Modarressi, Hamid Sarbazi-Azad