869 search results - page 63 / 174 » Cache Architectures for Reconfigurable Hardware |
JUCS
2000
14 years 9 months ago
2000
: Studying the architectural evolution of mainstream field programmable gate arrays (FPGAs) leads to the following remark: in these circuits, the proportion of silicon devoted to r...
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
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FPL
2003
Springer
15 years 3 months ago
2003
Springer
Distributed Arithmetic techniques are widely used to implement Sum-of-Products computations such as calculations found in multimedia applications like FIR filtering and Discrete Co...
HIPC
1999
Springer
15 years 2 months ago
1999
Springer
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
ASAP
2005
IEEE
15 years 3 months ago
2005
IEEE
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...