869 search results - page 7 / 174 » Cache Architectures for Reconfigurable Hardware |
68
Voted
HPCA
2008
IEEE
15 years 10 months ago
2008
IEEE
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
73
Voted
FPL
2008
Springer
14 years 11 months ago
2008
Springer
This paper presents a novel method to perform on-the-fly attestation of hardware structures loaded to reconfigurable devices. Given that a loadable hardware structure to a reconfi...
ASPDAC
2008
ACM
14 years 11 months ago
2008
ACM
Complex design, targeting System-on-Chip based on reconfigurable architectures, still lacks a generalized methodology allowing both the automatic derivation of a complete system s...
112
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ERSA
2009
14 years 7 months ago
2009
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
DAC
1999
ACM
15 years 1 months ago
1999
ACM