45 search results - page 6 / 9 » Cache Performance Optimizations for Parallel Lattice Boltzma... |
ICPP
1999
IEEE
15 years 1 months ago
1999
IEEE
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
107
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IEEEPACT
2009
IEEE
14 years 7 months ago
2009
IEEE
As the gap between processor and memory continues to grow, memory performance becomes a key performance bottleneck for many applications. Compilers therefore increasingly seek to m...
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Abstract--The growing complexity in computer system hierarchies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of pr...
104
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IPPS
1998
IEEE
15 years 1 months ago
1998
IEEE
The increasing gap in processor and memory speeds has forced microprocessors to rely on deep cache hierarchies to keep the processors from starving for data. For many applications...
EUROPAR
2003
Springer
15 years 2 months ago
2003
Springer
Hardware performance monitoring is the basis of modern performance analysis tools for application optimization. We are interested in providing such performance analysis tools for t...