37 search results - page 5 / 8 » Cache Replacement Policies for Multicore Processors |
MICRO
2009
IEEE
14 years 27 days ago
2009
IEEE
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
ISCA
2007
IEEE
14 years 16 days ago
2007
IEEE
High availability is an increasingly important requirement for enterprise systems, often valued more than performance. Systems designed for high availability typically use redunda...
IEEEPACT
2009
IEEE
2009
IEEE
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
14 years 27 days ago
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...
EUC
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. Power consumption is becoming one of the most important constraints for microprocessor design in nanometer-scale technologies. Especially, as the transistor supply voltag...
VALUETOOLS
2006
ACM
14 years 6 days ago
2006
ACM
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...