83 search results - page 14 / 17 » Cache Replacement with Dynamic Exclusion |
157
Voted
ASPLOS
2012
ACM
14 years 17 days ago
2012
ACM
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...
148
click to vote
TC
2008
15 years 4 months ago
2008
Abstract--Today's storage systems place an imperative demand on energy efficiency. A storage system often places single-rotationrate disks into standby mode by stopping them f...
130
click to vote
MICRO
2006
IEEE
15 years 11 months ago
2006
IEEE
This paper presents NoSQ (short for No Store Queue), a microarchitecture that performs store-load communication without a store queue and without executing stores in the outof-ord...
153
Voted
MICRO
2005
IEEE
15 years 10 months ago
2005
IEEE
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
160
click to vote
ICDCS
2008
IEEE
15 years 11 months ago
2008
IEEE
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...