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2006
IEEE
15 years 10 months ago
Positioning Dynamic Storage Caches for Transient Data
Simulations, experiments and observatories are generating a deluge of scientific data. Even more staggering is the ever growing application demand to process and assimilate these...
Sudharshan S. Vazhkudai, Douglas Thain, Xiaosong M...
DAC
2002
ACM
16 years 5 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
ISCA
1994
IEEE
117views Hardware» more  ISCA 1994»
15 years 8 months ago
Evaluating Stream Buffers as a Secondary Cache Replacement
Today's commodity microprocessors require a low latency memory system to achieve high sustained performance. The conventional high-performance memory system provides fast dat...
Subbarao Palacharla, Richard E. Kessler
155
Voted
CASES
2008
ACM
15 years 6 months ago
Reducing pressure in bounded DBT code caches
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
José Baiocchi, Bruce R. Childers, Jack W. D...
ICCD
2005
IEEE
127views Hardware» more  ICCD 2005»
16 years 1 months ago
Using Scratchpad to Exploit Object Locality in Java
Performance of modern computers is tied closely to the effective use of cache because of the continually increasing speed discrepancy between processors and main memory. We demons...
Carl S. Lebsack, J. Morris Chang