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WSC
2004
15 years 1 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
SASP
2009
IEEE
291views Hardware» more  SASP 2009»
15 years 6 months ago
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
Alexandros Papakonstantinou, Karthik Gururaj, John...
CIRA
2007
IEEE
113views Robotics» more  CIRA 2007»
15 years 6 months ago
Development of Control for a Serpentine Robot
—This paper describes the development and testing of control of the OmniTread OT-4 robot by the Seventh Generation (7G) Control System. Control of OT-4 was developed in the Yobot...
William R. Hutchison, Betsy J. Constantine, Johann...
CISIS
2008
IEEE
15 years 6 months ago
Hybrid Performance Modeling and Prediction of Large-Scale Computing Systems
Abstract—Performance is a key feature of large-scale computing systems. However, the achieved performance when a certain program is executed is significantly lower than the maxi...
Sabri Pllana, Siegfried Benkner, Fatos Xhafa, Leon...
ISCAPDCS
2003
15 years 1 months ago
Dynamic Simultaneous Multithreaded Architecture
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
Daniel Ortiz Arroyo, Ben Lee