380 search results - page 47 / 76 » Cache-oblivious simulation of parallel programs |
113
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HPCA
2011
IEEE
14 years 3 months ago
2011
IEEE
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
PACT
1997
Springer
15 years 3 months ago
1997
Springer
Abstract. Recent trend in high-performance computing focuses on networks of workstations (NOWs) as a way ofrealizing cost-effective parallel machines. This has been due to the avai...
116
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ICCS
2001
Springer
15 years 4 months ago
2001
Springer
Towards the realization of a global coupled air/ocean/ice predictive system for Navy needs, two high resolution modeling efforts are underway whose goals are the development and up...
109
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JPDC
2000
14 years 11 months ago
2000
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
IPPS
2000
IEEE
15 years 4 months ago
2000
IEEE
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...