169 search results - page 26 / 34 » Caching Intermediate Results for Program Improvement |
VLSID
2002
IEEE
16 years 1 days ago
2002
IEEE
This paper presents a novel technique, called input space adaptive software synthesis, for the energy and performance optimization of embedded software. The proposed technique is ...
186
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ASPLOS
2009
ACM
16 years 9 days ago
2009
ACM
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...
ISCA
1997
IEEE
15 years 3 months ago
1997
IEEE
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...
105
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ASPLOS
1998
ACM
15 years 3 months ago
1998
ACM
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
75
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ASPLOS
1996
ACM
15 years 3 months ago
1996
ACM
New high-speed networks greatly encourage the use of network memory as a cache for virtual memory and file pages, thereby reducing the need for disk access. Becausepages are the f...